Technical Note - Actuator Serial Interface

Scope of This Document

This technical note describes the Serial (half-duplex, single-wire UART) interface of the Actuator 48W SmartServo. The serial protocol implemented on Actuator uses an address-based command model built around direct register access plus a small deferred-write transaction flow. The host-visible instruction set is intentionally compact: READ, WRITE, ADD, COMMIT, and ABORT.

Key Characteristics

Half-duplex, single-wire TTL UART physical layer with shared TX/RX on one signal line
Packet-based Instruction / Status exchange with a 1-byte packet header 0x80 or 0x81
CRC-16 checksum on every packet for transmission error detection
Multi-drop daisy-chain bus where many servos share one signal line back to the host
Deferred-write transaction support through ADD / COMMIT / ABORT
Selectable baud rate, up to 4 Mbps

Physical Layer Summary

Interface TypeHalf-duplex UART, single wire
Logic LevelTTL, 3.3V / 5V compatible
Data Format8-N-1 (8 data, no parity, 1 stop)
Baud Rate300 bps to 4 Mbps
Bus TopologyMulti-drop daisy chain
Connector / PinMolex 5045 (3-pin), SIG pin
Base ProtocolActuator native register protocol

Bus Topology

In Serial mode, the SIG pin of each Actuator is wired to the same signal line as every other servo on the bus and back to the host controller's single UART pin. Because the line is half-duplex, only one device (host or servo) drives the bus at any instant; servos remain in high-impedance receive mode until they are addressed and required to reply.

HOST
UART (half-duplex)

-----

Actuator
ID 1

-----

Actuator
ID 2

-----

Actuator
ID 3

----- ... -----

Actuator
ID N

Each unit exposes two equivalent SIG connections for pass-through daisy-chain wiring, so no external splitter is required. A common GND reference must be shared by all nodes and the host.

Packet Structure

Actuator SERIAL

Instruction / Status Packet Structure - Technical Note v1.0

1. Instruction Packet (Host to Servo)

Every packet begins with a 1-byte header. 0x80 means the effective packet length is LEN in the range 0-255, while 0x81 means the effective packet length is 256 + LEN in the range 256-511. In other words, the header contributes the 9th bit of length and the protocol treats length as a 9-bit value. The effective length counts every byte from LEN through CRC_H. After that come LEN_ID, ID_LIST, CMD, LEN_ADDR, a possibly compressed ADDR_LIST, an optional DATA_LIST, and the 2-byte CRC. If LEN_ADDR = 0x00, then LEN_ADDR, ADDR_LIST, and DATA_LIST are omitted and implicitly reused from the immediately preceding packet, regardless of whether that preceding packet was an Instruction Packet or a Status Packet. READ and all *WITHACK commands must target exactly one servo and may not use the broadcast ID. The non-acknowledged WRITE, ADD, COMMIT, and ABORT commands may list one or more servo IDs.

0x80 / 0x81

Header

LEN

total length

LEN_ID

ID list length

ID_LIST

1..N IDs

CMD

read/write/add

LEN_ADDR

addr count

ADDR_LIST

packed addrs

DATA_LIST

write/add/status

CRC_L

CRC low

CRC_H

CRC high

Field	Size	Description
Header	1 B	Start-of-packet byte. 0x80 selects effective length 0-255; 0x81 selects effective length 256-511.
LEN	1 B	Low 8 bits of the effective packet length counted from LEN through CRC_H
LEN_ID	1 B	Number of target IDs that follow. READ and all *WITHACK commands must use 0x01. WRITE, ADD, COMMIT, and ABORT may use one or more IDs.
CMD	1 B	Instruction selector: READ, WRITE, WRITE_WITH_ACK, ADD, ADD_WITH_ACK, COMMIT, COMMIT_WITH_ACK, ABORT, or ABORT_WITH_ACK.
LEN_ADDR	1 B	Number of logical addresses referenced by the request. If this field is 0x00, then the packet reuses the immediately preceding packet's LEN_ADDR, ADDR_LIST, and DATA_LIST, without distinguishing whether that preceding packet was an Instruction Packet or a Status Packet.
ADDR_LIST	PACKED_ADDR_LEN B	Packed one-byte register addresses, where PACKED_ADDR_LEN <= LEN_ADDR. The nonvolatile area occupies 0x80-0xCF; the volatile area starts at 0xD0. Because all valid addresses are 0x80 or higher, any byte below 0x80 inside a packed address stream is interpreted as a contiguous-run length rather than as an address. Omitted when LEN_ADDR = 0x00.
DATA_LIST	LEN_ADDR B (non-commit commands) / 0 B (commit-family commands)	Present only for WRITE and ADD requests. Each byte maps positionally to the corresponding address in ADDR_LIST. COMMIT, COMMIT_WITH_ACK, ABORT, and ABORT_WITH_ACK read ADDR_LIST but must not carry any DATA_LIST. Omitted when LEN_ADDR = 0x00.
CRC L / H	2 B	16-bit CRC checksum; see Page 3, Section 1

Packet Structure

Actuator SERIAL

Status Packet Structure - Technical Note v1.0

2. Status Packet (Servo to Host)

After executing READ or any unicast *WITHACK instruction, the addressed servo returns a Status Packet. Status packets use the same header and LEN rule, including the same LEN_ADDR = 0x00 reuse rule for the immediately preceding packet. If the servo is in a state where it can reply, it must begin replying within 1000 / baud_rate seconds. If the bus remains occupied by other traffic during that entire interval, the servo treats the reply as failed. The host must release the bus (switch its UART to receive) before the servo response begins.

Field	Size	Description
Header	1 B	Same start-of-packet byte rule: 0x80 selects effective length 0-255; 0x81 selects effective length 256-511.
LEN	1 B	Low 8 bits of the effective packet length counted from LEN through CRC_H
LEN_ID	1 B	Always fixed to 0x01 in a Status Packet
ID_LIST	LEN_ID B	The one responding servo ID
STATUS	1 B	Response selector: 0x11 = STATUS, 0x12 = ACK_SUCCESS, 0x13 = ACK_FAIL
LEN_ADDR	1 B	Number of returned addresses in the response payload. ACK_SUCCESS and ACK_FAIL always use 0x00. If this field is 0x00, then the packet reuses the immediately preceding packet's LEN_ADDR, ADDR_LIST, and DATA_LIST, without distinguishing whether that preceding packet was an Instruction Packet or a Status Packet.
ADDR_LIST	PACKED_ADDR_LEN B	Packed returned-address stream, where PACKED_ADDR_LEN <= LEN_ADDR. Omitted when LEN_ADDR = 0x00.
DATA_LIST	LEN_ADDR B	Returned data bytes for STATUS / READ responses. Omitted when LEN_ADDR = 0x00.
CRC L / H	2 B	16-bit CRC checksum; see Page 3, Section 1

CRC / Instruction Set

Actuator SERIAL

Error Detection - Command Codes - Technical Note v1.0

1. CRC-16 Checksum

Every packet ends with a 2-byte CRC value covering the entire preceding packet, from Header through the last byte before the CRC field itself. The Actuator CRC is a simple positional XOR checksum split by byte parity: CRC_L (transmitted first) is the XOR of every byte at an odd position (1st, 3rd, 5th, ...); CRC_H (transmitted second) is the XOR of every byte at an even position (2nd, 4th, 6th, ...). A receiver recomputes both values over the received bytes and discards the packet as a transmission error if either does not match.

crc_l = 0x00 crc_h = 0x00 for i, b in enumerate(packet[0 .. length-3], start=1): # 1-based, Header .. last byte before CRC if i is odd: crc_l ^= b else: crc_h ^= b CRC_L = crc_l CRC_H = crc_h

2. Packet ID Range

ID Value	Meaning	Note
0xFF (255)	Broadcast ID	All servos on the bus execute the instruction. No reply is defined, because the reply-producing commands are READ and the *WITHACK variants, and none of them may use 0xFF.

3. Instruction Set

Instruction	Code	Description
READ	0x01	Read one or more explicitly listed register addresses from exactly one target servo; broadcast is not allowed
WRITE	0x02	Write one data byte per listed address and apply immediately; may target one or more listed IDs
ADD	0x03	Store one data byte per listed address in temporary memory without applying it yet; may target one or more listed IDs
COMMIT	0x04	Apply the most recently added deferred write for one or more listed IDs; ignored if no pending ADD exists
ABORT	0x05	Discard the most recently added deferred write for one or more listed IDs without applying it
WRITE_WITH_ACK	0x06	Immediate write with mandatory unicast acknowledgement; exactly one target ID, broadcast not allowed
ADD_WITH_ACK	0x07	Deferred write staging with mandatory unicast acknowledgement; exactly one target ID, broadcast not allowed
COMMIT_WITH_ACK	0x08	Commit pending ADD with mandatory unicast acknowledgement; exactly one target ID, broadcast not allowed
ABORT_WITH_ACK	0x09	Abort pending ADD with mandatory unicast acknowledgement; exactly one target ID, broadcast not allowed
STATUS	0x11	Servo -> Host response instruction code (never sent by the host)
ACK_SUCCESS	0x12	Servo -> Host acknowledgement for a successful *WITHACK instruction
ACK_FAIL	0x13	Servo -> Host acknowledgement for a failed *WITHACK instruction

Command Layout and Transactions

Actuator Serial Interface

Instruction Parameters - Transaction Semantics - Technical Note v1.0

1. Core Command Layout

After the packet header, every host packet carries LEN, then LEN_ID and ID_LIST, followed by CMD, LEN_ADDR, ADDR_LIST, and when applicable DATA_LIST. WRITE and ADD use both address and data streams. COMMIT, COMMIT_WITH_ACK, ABORT, and ABORT_WITH_ACK read ADDR_LIST but never carry DATA_LIST. If LEN_ADDR = 0x00, the packet reuses the immediately preceding packet's LEN_ADDR, ADDR_LIST, and DATA_LIST, regardless of whether that earlier packet was an Instruction Packet or a Status Packet. Multi-byte fields are little-endian only where the field itself spans multiple bytes.

Address-list compression rule: consecutive addresses may be sent as first address plus run length. Because every valid public address is 0x80 or higher, any byte below 0x80 inside ADDR_LIST is interpreted as a contiguous length, not as an address. A run length of 0x01 is never sent. For example, 0x91 0x92 0x93 0x94 may be encoded as 0x91 0x04, while a single address 0x91 must remain just 0x91.

2. Transaction Semantics

The deferred-write path is simple: WRITE applies immediately, ADD stores one pending write, COMMIT applies that pending write for the addresses named in ADDR_LIST, and ABORT discards it. COMMIT-family and ABORT-family packets never carry DATA_LIST. READ is always single-target. All other commands may carry multiple target IDs. Factory reset and reboot are requested by writing non-zero values to dedicated volatile registers rather than by using separate instruction codes.

Operation	State Change	Description
ADD	Empty -> Pending	Saves the supplied address and value bytes into temporary memory and replaces any older pending ADD
COMMIT	Pending -> Empty	Reads ADDR_LIST, applies the pending ADD contents for those addresses, then clears the temporary state. No DATA_LIST is carried.
COMMIT	Empty -> Empty	If no pending ADD exists, the command is ignored
ABORT	Pending -> Empty	Reads ADDR_LIST and discards the pending ADD contents for those addresses without applying them. No DATA_LIST is carried.
ABORT	Empty -> Empty	If no pending ADD exists, the command simply leaves the state unchanged

Broadcast Behavior

Control Table

Actuator SERIAL

Register Map - Baud Rate Index - Technical Note v1.0

The public register map is split into two 1-byte address spaces: the nonvolatile area occupies 0x80-0xCF and the volatile area occupies 0xD0-0xFF. Addresses below are the values that appear directly inside ADDR_LIST. Multi-byte fields are little-endian. If the full bit width is not needed, the host may read or write only part of a multi-byte field by addressing just the required bytes, for example only the upper bytes of a velocity value or only the lower bytes of a position value.

1. Nonvolatile Area — persistent across power cycles; writable only while Torque Enable = 0

Addr	Type	Name	Access	Default	Description
0x80	u8	Model Number	R/W	Varies	User-writable product model code
0x81	u8	Firmware Version	R	Varies	Current firmware revision
0x82	u8	ID	R/W	1	Servo bus address, 0-254
0x83	u8	Baud Rate	R/W	8	Index into Baud Rate table below
0x84	u8	Return Delay Time	R/W	250	Delay before Status Packet transmission, in 2 µs units
0x85	u8	Operating Mode Mask	R/W	0	0x00 disables the output path but does not alter Torque Enable 0xD0; bit 0x01 = Current, bit 0x02 = Velocity, and bit 0x04 = Position. Bit 0x08 is only a continuous-position modifier: it is retained only when 0x04 is also present, so 0x0C (12) = continuous Position. A bare 0x08 is ignored; consequently 0x09→0x01 (Current), 0x0A→0x02 (Velocity), and 0x0B→0x03 (Velocity + Current). Current and Velocity bits may be combined, and Position may be combined with either. With Position and Velocity asserted, the velocity reference is w_ref = w_d + C_p(q_d-q). A clear bit contributes no corresponding external goal. 0xFF (-1) is the sole Raw PWM Override value, mutually exclusive with every closed-loop mode; it makes 0xF9 host-writable and bypasses closed-loop protections for bench use only. All normal closed-loop combinations use Position → Velocity → Current → PWM.
0x86	i64	Zero Position	R/W	0	Offset added to the absolute encoder position, in 0.1 deg units
0x8E	u8	Temperature Limit	R/W	80	Overtemperature shutdown threshold, °C
0x8F	u16	Max Voltage Limit	R/W	16000	Upper supply-voltage protection threshold, in mV
0x91	u16	Min Voltage Limit	R/W	5000	Lower supply-voltage protection threshold, in mV
0x93	u16	Current Limit	R/W	3000	Maximum input current limit, in mA. Goal Current is written back clamped to +/- this magnitude.
0x95	i16	Max Velocity Limit	R/W	32767	Upper bound for Velocity control mode, in 0.1 deg/s. The default is INT16_MAX; zero is a valid limit. A Goal Velocity above this value is written back clamped to this value.
0x97	i16	Min Velocity Limit	R/W	-32768	Lower bound for Velocity control mode, in 0.1 deg/s. The default is INT16_MIN; zero is a valid limit. A Goal Velocity below this value is written back clamped to this value.
0x99	i32	Max Acceleration Limit	R/W	0	Upper bound for acceleration limiting, in 0.1 deg/s^2. 0 means no limit.
0x9D	i32	Min Acceleration Limit	R/W	0	Lower bound for acceleration limiting, in 0.1 deg/s^2. 0 means no limit.
0xA1	i64	Max Position Limit	R/W	9223372036854775807	Upper bound for Position control mode, in 0.1 deg units. The default is INT64_MAX; zero is a valid limit. A Goal Position above this value is written back clamped to this value.
0xA9	i64	Min Position Limit	R/W	-9223372036854775808	Lower bound for Position control mode, in 0.1 deg units. The default is INT64_MIN; zero is a valid limit. A Goal Position below this value is written back clamped to this value.
0xB1	u16	PWM Min	R/W	1000	Minimum PWM high time, in µs
0xB3	u16	PWM Max	R/W	2000	Maximum PWM high time, in µs
0xB5	u16	PWM Timeout	R/W	10000	If PWM stays without a high pulse for this duration, in µs, the signal is treated as lost
0xB7	u16	Position P Gain	R/W	Varies	Position control loop proportional gain; scale is 1/256.
0xB9	u16	Position I Gain	R/W	Varies	Position control loop integral gain; scale is 1/256.
0xBB	u16	Position D Gain	R/W	Varies	Position control loop derivative gain; scale is 1/256.
0xBD	u16	Velocity P Gain	R/W	Varies	Velocity control loop proportional gain; scale is 1/256.
0xBF	u16	Velocity I Gain	R/W	Varies	Velocity control loop integral gain; scale is 1/256.
0xC1	u16	Velocity D Gain	R/W	Varies	Velocity control loop derivative gain; scale is 1/256.
0xC3	u16	Torque P Gain	R/W	Varies	Torque control loop proportional gain; scale is 1/64, so each register unit has four times the former Q8 effect.
0xC5	u16	Torque I Gain	R/W	Varies	Torque control loop integral gain; scale is 1/64, so each register unit has four times the former Q8 effect.
0xC7	u16	Torque D Gain	R/W	Varies	Torque control loop derivative gain; scale is 1/64, so each register unit has four times the former Q8 effect.
0xC9	u8	Reverse Direction	R/W	0	0 = normal direction; 1 = reversed direction. Inverts commanded and reported direction for position, velocity, and torque.
0xCA	u16	Torque Anti-Windup Shift	R/W	3	Integral decay rate while the torque loop's output is saturated and the sign matches the commanded direction: the integral is reduced by 1/2^n per control tick (n = this value) instead of being frozen outright. Smaller values unwind faster.
0xCC	u16	Velocity Anti-Windup Shift	R/W	3	Same decay-rate behavior as the Torque Anti-Windup Shift, applied to the velocity control loop's integral term.
0xCE	u16	Position Anti-Windup Shift	R/W	3	Same decay-rate behavior as the Torque Anti-Windup Shift, applied to the position control loop's integral term.

The servo can also accept PWM input in addition to serial input. When PWM is present, the meaning of the PWM duty / pulse width is determined by the current Operating Mode setting above. Position quantities use 0.1 deg units, velocity quantities use 0.1 deg/s, acceleration quantities use 0.1 deg/s^2, voltage uses mV, current uses mA, and torque uses 10 mW units. The so-called torque mode is therefore a power-control mode. Type values marked u* are unsigned integers, and values marked i* are signed integers.

Baud Rate Index (Address 0x83)

Index	Baud Rate	Note	Index	Baud Rate	Note	Index	Baud Rate	Note
0	300	—	5	19,200	—	10	460,800	—
1	1,200	—	6	38,400	—	11	921,600	—
2	2,400	—	7	57,600	—	12	1 M	—
3	4,800	—	8	115,200	Factory default	13	1.5 M	—
4	9,600	—	9	230,400	—	14	2 M	—

Control Table

Actuator SERIAL

Volatile Area - Baud Rate Index - Technical Note v1.0

2. Volatile Area — resets to initial value 0 on power-up

Addr	Type	Name	Access	Initial	Description
0xD0	u8	Torque Enable	R/W	0	0 = free-wheel; 1 = torque on
0xD1
0xD2	u8	Factory Reset Request	W	0	READ always fails. Writing any non-zero value requests factory reset; 0 has no effect. If requested through a *WITHACK command, the reset executes immediately after the ACK is sent. If the bus remains occupied and the ACK cannot be sent before the reply deadline, the reset is not executed and this byte is written back to 0x00.
0xD3	u8	Reboot Request	W	0	READ always fails. Writing any non-zero value requests reboot; 0 has no effect. If requested through a *WITHACK command, the reboot executes immediately after the ACK is sent. If the bus remains occupied and the ACK cannot be sent before the reply deadline, the reboot is not executed and this byte is written back to 0x00.
0xD4	u8	Hardware Error Status	R	0	Latched until reboot and diagnostic only: reading or asserting this register never changes Torque Enable or control mode. Overcurrent = 0x01 (Current Limit), overtemperature = 0x02 (Temperature Limit), supply-voltage limit violation = 0x04 (Min/Max Voltage Limit), electrical shock or motor failure = 0x08. Bit 0x08 is set after 100 ms of a material PWM command with less than 50 mA measured current, or after 100 ms above 50 mA while torque is disabled and fresh encoder feedback confirms the motor is not coasting.
0xD5	u8	Moving	R	0	1 while the servo is in motion toward its goal
0xD6	i16	Goal Current	R/W	0	External current feed-forward command, in mA. It contributes only while Current mode bit 0x01 is asserted; the cascade's internal current reference remains available as telemetry.
0xD8	i16	Goal Velocity	R/W	0	Target velocity, in 0.1 deg/s
0xDA	i64	Goal Position	R/W	0	Target position, in 0.1 deg units. In single-turn Position mode (0x04 without 0x08), writes and readback are normalized to 0..3599; 360.0 deg aliases to 0.0 deg. Continuous Position mode (0x0C) preserves unwrapped multi-turn values.
0xE2	u32	Profile Acceleration	R/W	0	Profile acceleration magnitude limit, in 0.1 deg/s^2
0xE6	u16	Profile Velocity	R/W	0	Profile velocity magnitude limit, in 0.1 deg/s
0xE8	i16	Present Current	R	0	Present signed input current, in mA. Negative values indicate reverse current flow.
0xEA	i16	Present Torque	R	0	Present output torque, in 10 mW units. Torque = current × voltage, so this is a power measurement.
0xEC	i16	Present Velocity	R	0	Present shaft velocity, in 0.1 deg/s
0xEE	i64	Present Position	R	0	Present encoder position, in 0.1 deg units. Single-turn Position mode publishes 0..3599; Continuous Position mode publishes the unwrapped multi-turn value.
0xF6	u16	Present Input Voltage	R	0	Present supply voltage, in mV
0xF8	u8	Present Temperature	R	0	Present internal temperature, °C
0xF9	i16	Present PWM Command	R/W*	0	Current signed PWM command applied by the low-level motor drive, in the internal -32768..32767 command scale. Normally read-only: the active control loop overwrites it every tick to report what it is doing. *Becomes writable when Operating Mode (0x85) is set to 0xFF (Debug PWM Override) - with no control loop running, nothing else is writing this register, so a value written here is applied directly as the PWM command. Bench-test use only; all closed-loop protection (current/voltage/thermal limits) is skipped while override is active.

Full control table (all addresses) is maintained in the Actuator firmware register reference; the tables above list the entries most commonly used for motion control over the serial bus.

Worked Examples I

Actuator SERIAL

CRC-Filled Example Packets - Technical Note v1.0

All CRC bytes below are fully calculated using the parity-split XOR rule defined on Page 3. Every hex line is shown exactly as transmitted on the wire.

1. Example - READ Present Position (ID 1)

Host reads eight bytes from Present Position on servo ID 0x01. The address span 0xEE through 0xF5 is contiguous, so the transmitted address stream is compressed as EE 08.

80 09 01 01 01 02 EE 08 6E 02

80 11 01 01 11 02 EE 08 34 12 00 00 00 00 00 00 4A 08

Field	Value
Request	80 09 01 01 01 02 EE 08 6E 02
Status	80 11 01 01 11 02 EE 08 34 12 00 00 00 00 00 00 4A 08
Returned data	34 12 00 00 00 00 00 00
Meaning	Present Position = 0x0000000000001234

2. Example - Multi-ID WRITE (IDs 1, 2, 3)

One immediate WRITE can target several servos at once. Here the host writes Torque Enable = 1 to 0xD0 for IDs 0x01, 0x02, and 0x03.

80 0B 03 01 02 03 02 01 D0 01 53 09

Field	Value
LEN	0D
LEN_ID	03
ID_LIST	01 02 03
CMD	02 (WRITE)
LEN_ADDR	02
ADDR_LIST	D0 02
DATA_LIST	01 01
CRC_L / CRC_H	52 0E

3. Example - LEN_ADDR Compression Without Broadcast

This example highlights that the protocol supports multi-ID unicast lists directly. No broadcast ID is used here, and there is no reply because plain WRITE is not a reply-producing command.

Property	Value
Applies to	Servo IDs 0x01, 0x02, 0x03
Address payload	D0 meaning logical address 0xD0
Data payload	01 meaning Torque Enable = 1
Why no reply	WRITE is not READ and not a *WITHACK command

Worked Examples II

Actuator SERIAL

Transactions - LEN_ADDR Reuse - Technical Note v1.0

1. Example - Full Transaction (Multiple ADDs, then Broadcast COMMIT)

The host stages different pending Goal Position values into several servos, then applies all of them at once with one broadcast COMMIT. Here ID 0x01 receives 2048, ID 0x02 receives 4096, and ID 0x03 receives 1024. Each per-servo ADD carries both ADDR_LIST and DATA_LIST. The final broadcast COMMIT carries only ADDR_LIST = DA 08; it does not carry any DATA_LIST.

80 11 01 01 03 02 DA 08 00 08 00 00 00 00 00 00 58 12

80 11 01 02 03 02 DA 08 00 10 00 00 00 00 00 00 58 09

80 11 01 03 03 02 DA 08 00 04 00 00 00 00 00 00 58 1C

80 09 01 FF 04 02 DA 08 5F FC

Packet	Meaning
ADD to ID 0x01	Stage Goal Position = 0x0000000000000800 using packed address stream DA 08
ADD to ID 0x02	Stage Goal Position = 0x0000000000001000 using the same packed address stream DA 08
ADD to ID 0x03	Stage Goal Position = 0x0000000000000400 using the same packed address stream DA 08
Broadcast COMMIT	Reads ADDR_LIST = DA 08, carries no DATA_LIST, and applies all staged Goal Position writes at once

2. Example - LEN_ADDR = 0x00 Reuse

Packet B below does not resend its address list or data list. Because it immediately follows Packet A, it reuses Packet A's resolved tuple LEN_ADDR = 0x02, ADDR_LIST = D0 02, and DATA_LIST = 01 01. Only the target ID changes from 0x01 to 0x02.

80 0B 01 01 02 02 D0 02 01 01 52 0B

80 07 01 02 02 00 83 05

Packet	Meaning
Packet A	WRITE ID 0x01, with explicit address/data payload
Packet B	WRITE ID 0x02, reusing the immediately preceding packet's address and data payload
Effect	Both servos receive the same Torque Enable = 1 write, but Packet B is shorter on the wire

Worked Examples III & Timing

Actuator SERIAL

ACK Behavior - Turnaround Timing - Document Version - Technical Note v1.0

1. Example - WRITE_WITH_ACK to Reboot Request

The host writes a non-zero byte to Reboot Request at 0xD3 using WRITE_WITH_ACK (0x06). The servo replies with ACK_SUCCESS (0x12) and then executes the reboot. If the bus stays occupied long enough that the ACK cannot start within 1000 / baud_rate seconds, the reboot does not execute and the request byte is cleared back to 0x00.

80 09 01 01 06 01 D3 01 54 08

80 07 01 01 12 00 93 06

Field	Value
Command code	0x06 = WRITE_WITH_ACK
Request target	ID 0x01
Request payload	LEN_ADDR = 0x01, ADDR_LIST = C3, DATA_LIST = 01
ACK payload	LEN_ADDR = 0x00 is mandatory for both ACK_SUCCESS and ACK_FAIL

2. Communication Timing

After receiving a valid unicast READ or *WITHACK instruction, the servo waits Return Delay Time (control table address 0x84, in 2 µs units, default 500 µs) before transmitting its reply. If the servo is in a state where it can reply, it must begin replying within 1000 / baud_rate seconds. If the bus remains occupied by other traffic during that whole interval, the reply is treated as failed.

Parameter	Formula / Value
Byte transmission time	t_byte = 10 / baud_rate
Reply-start deadline	t_reply_deadline = 1000 / baud_rate
Packet transmission time	t_pkt = packet_length_bytes × t_byte
Host receive window	t_pkt(instr) + Return Delay Time + t_pkt(status) + margin
Default Return Delay Time	500 µs because address 0x84 = 250 and each unit is 2 µs
Default baud rate	115200 bps (index 8)

3. Current Document Version

Version	Date	Description
v1.0	2026-07-03	Compact address-based actuator serial protocol reference, including multi-ID commands, deferred-write transactions, *WITHACK replies, LEN_ADDR = 0x00 reuse, and CRC-filled worked examples.

TechnicalNote

Packet Structure

Packet Structure

CRC / Instruction Set

Command Layout and Transactions

Control Table

Control Table

Worked Examples I

Worked Examples II

Worked Examples III & Timing

Technical
Note